 Synopsys Prime Time 1 培训班 |
| 入学要求 |
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学员学习本课程应具备下列基础知识：
◆ 电路系统的基本概念。 |
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班.级.规.模--热线:4008699035 手机:15921673576/13918613812( 微信同号) |
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坚持小班授课，为保证培训效果，增加互动环节，每期人数限3到5人。 |
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上.课.时.间.和.地.点 |
上课地点：【上海】：同济大学(沪西)/新城金郡商务楼(11号线白银路站) 【深圳分部】：电影大厦(地铁一号线大剧院站)/深圳大学成教院 【北京分部】：北京中山/福鑫大楼 【南京分部】：金港大厦(和燕路) 【武汉分部】：佳源大厦（高新二路） 【成都分部】：领馆区1号（中和大道） 【沈阳分部】：沈阳理工大学/六宅臻品 【郑州分部】：郑州大学/锦华大厦 【石家庄分部】：河北科技大学/瑞景大厦 【广州分部】：广粮大厦 【西安分部】：协同大厦
近开课时间(周末班/连续班/晚班）：Synopsys Prime Time 1 培训班：具体开班时间请咨询客服！ |
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实验设备 |
☆资深工程师授课
☆注重质量
☆边讲边练
☆推荐工作
专注高端培训17年，曙海提供的课程得到本行业的广泛认可，学员的能力
得到大家的认同，受到用人单位的广泛赞誉。
★实验设备请点击这儿查看★ |
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新优惠 |
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◆在读学生凭学生证，可优惠500元。 |
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质量保障 |
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1.免费重修；
2、课程完成后,授课老师留给学员手机和Email,保障培训效果,免费提供半年的技术支持。
3、培训合格学员可享受免费推荐就业机会。 |
Synopsys Prime Time 1 培训班
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本课程可帮助IC工程师进一步全面系统地理解IC设计概念与方法。培训将采用Synopsys公司相关领域的培训教材，培训方式以讲课和实验穿插进行。
Overview
This workshop shows you how to maximize your productivity when using PrimeTime. You will validate and enhance run scripts, quickly identify and debug your design violations by generating and interpreting timing reports, remove pessimism with path-based analysis, and generate ECO fixing guidance to downstream tools.
Topics include:
- Preparing for STA on your design, including investigating and analyzing the clocks that dictate STA results
- Validating inherited PrimeTime run scripts
- Leveraging the latest PrimeTime best practices to create new run scripts
- Identifying opportunities to improve run time
- Performing static timing analysis
- Providing ECO fixing guidance to downstream tools
Objectives
At the end of this workshop the student should be able to:
- Interpret the essential details in a timing report for setup and hold, recovery and removal, and clock-gating setup and hold
- Generate timing reports for specific paths and with specific details
- Generate summary reports of the design violations organized by clock, slack, or by timing check
- Validate, confirm, debug, enhance, and execute a PrimeTime run script
- Create a PrimeTime run script based on seed scripts from the RMgen utility
- Identify opportunities to improve run time
- Create a saved session and subsequently restore the saved session
- Identify the clocks, where they are defined, and which ones interact on an unfamiliar design
- Reduce pessimism using path-based analysis
- Use both a broad automatic flow for fixing setup and hold violations and a manual flow for tackling individual problem paths.
Audience Profile
Design or verification engineers who perform STA using PrimeTime.
Prerequisites
To benefit the most from the material presented in this workshop, students should have:
- A basic understanding of digital IC design
- Familiarity with UNIX workstations running X-windows
- Familiarity with vi, emacs, or other UNIX text editors
Course Outline
阶段一
- Does your design meet timing?
- Objects, Attributes, Collections
- Constraints in a timing report
- Timing arcs in a timing report
- Control which paths are reported
阶段二
- Summary Reports
- Create a setup file and run script
- Getting to know your clocks
- Analysis types and back annotation
阶段三
- Additional checks and constraints
- Path-Based Analysis and ECO Flow
- Emerging Technologies and Conclusion
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总部李老师